1. Technical Field
The present teaching relates to method and system in connection with light emitting diode (LED) and systems incorporating the same. More specifically, the present teaching relates to method and system for LED driver and systems incorporating the same.
2. Discussion of Technical Background
The emergence of high brightness light emitting diodes (LEDs) has led the conventional lighting world into a new era of solid state lighting. High optical efficiency, long operating lifetime, wide operating temperature range, and environmental friendliness are some key features in favor of LED technology over incandescent or fluorescent solutions. While uniformly-controlled LEDs dominate in high performance LCD backlighting, a large array of individually-modulated LEDs is increasingly finding new applications in dynamic LCD backlighting and LED display. Due to manufacturing variations in forward voltage drop, luminous flux output, and peak wavelength, however, these applications require either binning strategy with the penalty of low yield and high cost, or better circuit enhancement techniques other than a simple resistor based solution.
Powered by an individually-modulated multi-channel driver, a large array of LEDs can be divided into multiple channels with one or more LEDs connected in series per channel. Each channel requires individual dot correction current adjustment and individual grayscale pulse width modulation (PWM) dimming. The dot correction current adjustment calibrates the brightness deviation between channels, and the grayscale PWM dimming controls the brightness without any color shift.
To achieve a better performance, PWM dimming signals are synchronized to the same frequency with no phase shift between rising edges. In addition to these essential functions, two measures, namely system efficiency and minimum LED on time, aim at further evaluating the performance of such an individually-modulated multi-channel LED driver. The system efficiency is defined as the total LED output power divided by the total input power. Thus, a lower level of power dissipation across the LED driver increases the system efficiency. The minimum LED on time is measured based on the time interval from the beginning of a PWM rising edge to the time when the LED current reaches a regulated level. Therefore, a shorter minimum LED on time corresponds to a faster response time and a higher contrast ratio, which is desirable in high performance display applications.
Various circuits based on switching regulators have been developed to drive a single channel of series LEDs with high efficiencies. FIG. 1 (Prior Art) shows application of such techniques being applied to multiple channels of LEDs. Circuit 100 comprises an input voltage 105 being supplied to multiple channels 110, 130, . . . , 150. Each channel includes a single channel switching LED driver, e.g., 120, 140, . . . , 160, and associated components such as serially connected diodes (115-a to 115-b, 135-a to 135-b, . . . , and 155-a to 155-b) and a capacitor (125, 145, . . . , 165).
This type of separate architecture as shown in FIG. 1 is not always warranted because of dedicated switching circuitry and passive components (i.e., inductors and capacitors) for each channel. At the same time, slow transient response inherent to switching regulators, caused by slewing inductor current, charging capacitor voltage, and limited switching frequency, imposes a longer minimum LED on time ranging from several to tens of microseconds.
Efforts have been made to address such problems. FIGS. 2 and 3 (Prior Art) illustrate two of such solutions based on a parallel architecture, in which a single power converter is combined with multiple linear current sinks. Such a parallel architecture eliminates the need for dedicated complex switching circuitry and external passive components for each channel, and replaces them with simplified linear circuitry. The single power converter, in a form of inductor, capacitor, or transformer based voltage regulator, converts a wide range of input voltage to a single LED bus voltage which is supplied to all channels. Each current sink regulates and modulates its current to the desired current adjustment and PWM dimming setting. At the same time, the current sink absorbs the extra voltage drop equal to the LED bus voltage minus the practical LED forward voltage drop.
The first parallel solution, as shown in FIG. 2 (Prior Art), adopts an independent power converter 205. The output LED bus voltage 255 is regulated to a preset constant value independent of the dynamics of all LED channels. This prior art circuit 200 comprises an independent power converter 205, a resistor divider network 210, a bulk output capacitor 225, and a plurality of parallel channels. Each of the parallel channels includes a corresponding linear current sink (230, 250, . . . , 270) connected to the output LED bus voltage via serially connected diodes (230 via diodes 235 to 240, 250 via diodes 265 to 260, . . . , and 270 via diodes 285 to 280).
The output LED bus voltage is programmed through feedback resistors 215 and 220 to a preset constant value based on worst-case LED forward voltage drops across temperature, current, and manufacturing variations. Since the LED bus voltage is set high enough at the rising edge of each PWM signal, the response time to inject inductor current and to charge capacitor voltage is no longer necessary. Therefore, the minimum LED on time is only limited by the transient response of the linear current sink, which is usually much faster, ranging from tens to hundreds of nanoseconds. Such a shorter minimum LED on time leads to a faster response time and a higher contrast ratio. However, strong temperature coefficient and current dependence coupled with immature manufacturing technology cause large variations in LED forward voltage drop, leading to higher power dissipation and lower system efficiency. Although LED binning strategy can improve system efficiency by reducing the LED forward voltage variations, this drives up the cost.
The second parallel solution, as shown in FIG. 3 (Prior Art), adopts an adaptive power converter 305. In this prior art circuit 300, instead of a preset constant value, the output LED bus voltage 355 is tracked to a minimum value required to maintain all active LED channels in regulation on the fly. The prior art circuit 300 comprises also multiple channels, each of which has a corresponding current sink (330, 350, . . . , 370) connected to the output LED bus voltage 355 via serially connected diodes (330 via 340 to 335, 350 via 365 to 360, . . . , and 370 via 385 to 380). In addition, circuit 300 also includes a detector 310 that detects the minimum LED voltage among VLED1 to VLEDn and sends such detected result to the adaptive power converter 305.
At the beginning of each PWM dimming cycle, the majority of LED channels, if not all, are turned on and thus the LED bus voltage is regulated to its highest value. As subsequent worst-case LED channels are turned off gradually, the detector 310 tracks the minimum LED voltage and sends such detection result to the power converter 305, which adapts the LED bus voltage to a lower value and still keeps the remaining active LED channels in regulation without wasting any extra unnecessary power. This adaptive tracking LED bus voltage improves system efficiency by removing unnecessary power dissipation across the current sinks. However, the LED bus voltage may reach its lowest value just before the next PWM dimming cycle, right before the majority LED channels will be turned on again. When this occurs, the LED bus voltage is not high enough to keep all the active LED channels in regulation, and the minimum LED on time can be greatly increased to accommodate the slow transient response of the switching power converter charging the output capacitor to its highest value.